Full Wafer Redistribution and Wafer Embedding as Key Technologies for a Multi-Scale Neuromorphic Hardware Cluster

Together with the Kirchhoff-Institute for Physics(KIP) the Fraunhofer IZM has developed a full wafer redistribution and embedding technology as base for a large-scale neuromorphic hardware system. The paper will give an overview of the neuromorphic computing platform at the KIP and the associated hardware requirements which drove the described technological developments. In the first phase of the project standard redistribution technologies from wafer level packaging were adapted to enable a high density reticle-to-reticle routing on 200mm CMOS wafers. Neighboring reticles were interconnected across the scribe lines with an 8{\mu}m pitch routing based on semi-additive copper metallization. Passivation by photo sensitive benzocyclobutene was used to enable a second intra-reticle routing layer. Final IO pads with flash gold were generated on top of each reticle. With that concept neuromorphic systems based on full wafers could be assembled and tested. The fabricated high density inter-reticle routing revealed a very high yield of larger than 99.9%. In order to allow an upscaling of the system size to a large number of wafers with feasible effort a full wafer embedding concept for printed circuit boards was developed and proven in the second phase of the project. The wafers were thinned to 250{\mu}m and laminated with additional prepreg layers and copper foils into a core material. After lamination of the PCB panel the reticle IOs of the embedded wafer were accessed by micro via drilling, copper electroplating, lithography and subtractive etching of the PCB wiring structure. The created wiring with 50um line width enabled an access of the reticle IOs on the embedded wafer as well as a board level routing. The panels with the embedded wafers were subsequently stressed with up to 1000 thermal cycles between 0C and 100C and have shown no severe failure formation over the cycle time.Comment: Accepted at EPTC 201

Accelerated physical emulation of Bayesian inference in spiking neural networks

The massively parallel nature of biological information processing plays an important role for its superiority to human-engineered computing devices. In particular, it may hold the key to overcoming the von Neumann bottleneck that limits contemporary computer architectures. Physical-model neuromorphic devices seek to replicate not only this inherent parallelism, but also aspects of its microscopic dynamics in analog circuits emulating neurons and synapses. However, these machines require network models that are not only adept at solving particular tasks, but that can also cope with the inherent imperfections of analog substrates. We present a spiking network model that performs Bayesian inference through sampling on the BrainScaleS neuromorphic platform, where we use it for generative and discriminative computations on visual data. By illustrating its functionality on this platform, we implicitly demonstrate its robustness to various substrate-specific distortive effects, as well as its accelerated capability for computation. These results showcase the advantages of brain-inspired physical computation and provide important building blocks for large-scale neuromorphic applications.Comment: This preprint has been published 2019 November 14. Please cite as: Kungl A. F. et al. (2019) Accelerated Physical Emulation of Bayesian Inference in Spiking Neural Networks. Front. Neurosci. 13:1201. doi: 10.3389/fnins.2019.0120

Neuromorphic Hardware In The Loop: Training a Deep Spiking Network on the BrainScaleS Wafer-Scale System

Emulating spiking neural networks on analog neuromorphic hardware offers several advantages over simulating them on conventional computers, particularly in terms of speed and energy consumption. However, this usually comes at the cost of reduced control over the dynamics of the emulated networks. In this paper, we demonstrate how iterative training of a hardware-emulated network can compensate for anomalies induced by the analog substrate. We first convert a deep neural network trained in software to a spiking network on the BrainScaleS wafer-scale neuromorphic system, thereby enabling an acceleration factor of 10 000 compared to the biological time domain. This mapping is followed by the in-the-loop training, where in each training step, the network activity is first recorded in hardware and then used to compute the parameter updates in software via backpropagation. An essential finding is that the parameter updates do not have to be precise, but only need to approximately follow the correct gradient, which simplifies the computation of updates. Using this approach, after only several tens of iterations, the spiking network shows an accuracy close to the ideal software-emulated prototype. The presented techniques show that deep spiking networks emulated on analog neuromorphic devices can attain good computational performance despite the inherent variations of the analog substrate.Comment: 8 pages, 10 figures, submitted to IJCNN 201

Demonstrating Analog Inference on the BrainScaleS-2 Mobile System

We present the BrainScaleS-2 mobile system as a compact analog inference engine based on the BrainScaleS-2 ASIC and demonstrate its capabilities at classifying a medical electrocardiogram dataset. The analog network core of the ASIC is utilized to perform the multiply-accumulate operations of a convolutional deep neural network. At a system power consumption of 5.6W, we measure a total energy consumption of 192uJ for the ASIC and achieve a classification time of 276us per electrocardiographic patient sample. Patients with atrial fibrillation are correctly identified with a detection rate of (93.7${\pm}$0.7)% at (14.0${\pm}$1.0)% false positives. The system is directly applicable to edge inference applications due to its small size, power envelope, and flexible I/O capabilities. It has enabled the BrainScaleS-2 ASIC to be operated reliably outside a specialized lab setting. In future applications, the system allows for a combination of conventional machine learning layers with online learning in spiking neural networks on a single neuromorphic platform

Pattern representation and recognition with accelerated analog neuromorphic systems

Despite being originally inspired by the central nervous system, artificial neural networks have diverged from their biological archetypes as they have been remodeled to fit particular tasks. In this paper, we review several possibilites to reverse map these architectures to biologically more realistic spiking networks with the aim of emulating them on fast, low-power neuromorphic hardware. Since many of these devices employ analog components, which cannot be perfectly controlled, finding ways to compensate for the resulting effects represents a key challenge. Here, we discuss three different strategies to address this problem: the addition of auxiliary network components for stabilizing activity, the utilization of inherently robust architectures and a training method for hardware-emulated networks that functions without perfect knowledge of the system's dynamics and parameters. For all three scenarios, we corroborate our theoretical considerations with experimental results on accelerated analog neuromorphic platforms.Comment: accepted at ISCAS 201

Preliminary Study of Prospective ECG-Gated 320-Detector CT Coronary Angiography in Patients with Ventricular Premature Beats

BACKGROUND: To study the applicability of prospective ECG-gated 320-detector CT coronary angiography (CTCA) in patients with ventricular premature beats (VPB), and determine the scanning mode that best maximizes image quality and reduces radiation dose. METHODS: 110 patients were divided into a VPB group (60 cases) and a control group (50 cases) using CTCA. All the patients then underwent coronary angiography (CAG) within one month. CAG served as a reference standard through which the sensitivity, specificity, positive predictive value (PPV), and negative predictive value (NPV) of CTCA in diagnosing significant coronary artery stenosis (luminal stenosis ≥50%) could be analyzed. The two radiologists with more than 3 years' experience in cardiac CT each finished the image analysis after consultation. A personalized scanning mode was adopted to compare image quality and radiation dose between the two groups. METHODOLOGY/PRINCIPAL FINDINGS: At the coronary artery segment level, sensitivity, specificity, PPV, and NPV in the premature beat group were 92.55%, 98.21%, 88.51%, and 98.72% respectively. In the control group these values were found to be 95.79%, 98.42%, 90.11%, and 99.28% respectively. Between the two groups, specificity, sensitivity PPV, NPV was no significant difference. The two groups had no significant difference in image quality score (P>0.05). Heart rate (77.20±12.07 bpm) and radiation dose (14.62±1.37 mSv) in the premature beat group were higher than heart rate (58.72±4.73 bpm) and radiation dose (3.08±2.35 mSv) in the control group. In theVPB group, the radiation dose (34.55±7.12 mSv) for S-field scanning was significantly higher than the radiation dose (15.10±1.12 mSv) for M-field scanning. CONCLUSIONS/SIGNIFICANCE: With prospective ECG-gated scanning for VPB, the diagnostic accuracy of coronary artery stenosis is very high. Scanning field adjustment can reduce radiation dose while maintaining good image quality. For patients with slow heart rates and good rhythm, there was no statistically significant difference in image quality

Use of Computed Tomography and Positron Emission Tomography/Computed Tomography for Staging of Local Extent in Patients With Malignant Pleural Mesothelioma

PURPOSE The objective of this study was to determine the diagnostic value of computed tomography (CT) and positron emission tomography (PET)/CT for staging of malignant pleural mesothelioma (MPM) in patients undergoing induction chemotherapy. METHODS Sixty-two patients (median age, 61 years; female: n = 9) with proven MPM underwent CT after induction chemotherapy. Of these, 28 underwent additional PET/CT. Extrapleural pneumonectomy was performed for pathological TNM staging. Clinical TNM stage was assessed by 3 independent readers. Relative and absolute underestimation and overestimation were compared with pathological tumor stage. Sensitivity, specificity, and accuracy for differentiation between stages T2 and T3 were assessed. Interobserver agreement between the readers was analyzed (κ). RESULTS Positron emission tomography/CT and CT underestimated T stage in up to 30% of the cases. Positron emission tomography/CT had a higher accuracy for tumor extent compared with CT (PET/CT: 0.92; CT: 0.84). The accuracy for nodal staging was higher for CT than for PET/CT (PET/CT: 0.78; CT: 0.87). Concerning International Mesothelioma Interest Group classification, PET/CT improved the accuracy of preoperative staging compared with CT (PET/CT: 0.91; CT: 0.82). Interobserver agreement was moderate for CT (0.48-0.62) and good for PET/CT (0.64-0.83) for T staging. For nodal staging, interobserver agreement was fair to moderate for CT and good for PET/CT (CT: 0.37-0.51; PET/CT: 0.73-0.76). CONCLUSIONS Positron emission tomography/CT is more accurate and has a lower interobserver variability for clinical intrathoracic staging of MPM compared with CT. Nevertheless PET/CT underestimated tumor stage in a substantial number of cases, showing the need for a more accurate imaging technology or approach

From clean room to machine room: commissioning of the first-generation BrainScaleS wafer-scale neuromorphic system

The first-generation of BrainScaleS, also referred to as BrainScaleS-1, is a neuromorphic system for emulating large-scale networks of spiking neurons. Following a ‘physical modeling’ principle, its VLSI circuits are designed to emulate the dynamics of biological examples: analog circuits implement neurons and synapses with time constants that arise from their electronic components’ intrinsic properties. It operates in continuous time, with dynamics typically matching an acceleration factor of 10 000 compared to the biological regime. A fault-tolerant design allows it to achieve wafer-scale integration despite unavoidable analog variability and component failures. In this paper, we present the commissioning process of a BrainScaleS-1 wafer module, providing a short description of the system’s physical components, illustrating the steps taken during its assembly and the measures taken to operate it. Furthermore, we reflect on the system’s development process and the lessons learned to conclude with a demonstration of its functionality by emulating a wafer-scale synchronous firing chain, the largest spiking network emulation ran with analog components and individual synapses to date